Pin no.
Symbol
Function
1
NC
No Connection
2
VB0+
LCD Bias Voltages. These are the voltage sources to provide SEG
driving currents. These voltages are generated internally. Connect
capacitor of 2.2uF value between
① VA0+ & VA0-
② VA1+ & VA1+
③ VB0+ & VB0-
④ VB1+ & VB1+
3
VB1+
4
VB1-
5
VB0-
6
VA0+
7
VA1+
8
VA1-
9
VA0-
10
VLCD Out
High voltage LCD Power Supply. Connect these pins together.
A bypass capacitor CL of 1uF should be connected between VLCD and VSS.
11
VLCD_IN
12
VDD
Power supply, +3.3V. VDD supplies for Display Data RAM and digital logic,
13
VSS
Power supply, 0V.
14
WR1(/RD)
WR [1:0] controls the read/write operation of the host interface.
In parallel mode, WR [1:0] is 8bit 8080 mode. In serial interface modes, these two pins are not used,Connect them to VSS.
15
WR0(/WR)
16
C/D
Display/control data select “H”: display data; “L”: control data
17
/CS0
Chip select pin. Chip is selected when CS0=L (CS1=H hardwired internally)
18
/RST
External reset pin, low active. If RST not used, connect to VDD
19
D0
Bi-directional bus for parallel host interface. In serial modes, connect D[0] to SCK, D[3] to SDA, and D[15] to VDD.
20
D1
21
D2
22
D3
23
D4
24
D5
25
D6
26
D7
27
D15
D15= “H”bus mode is SPI;D15= “L”bus mode is 8080/8-bit;
28
29
30
