Pin No. | Symbol | I/O | Description |
1 | NC | - | No Connection |
2 | SDA | I/O | I2C data |
3 | SCL | I | I2C clock |
4~6 | NC | - | No Connection |
7 | LVDS_SEL | I | H: JEIDA; L/Open: Normal NS LVDS / VESA |
8~10 | NC | - | No Connection |
11 | GND | P | Ground |
12 | CH1[0]- | I | Differential Data Input, First Pixel Pair0 Negative |
13 | CH1[0]+ | I | Differential Data Input, First Pixel Pair0 Positive |
14 | CH1[1]- | I | Differential Data Input, First Pixel Pair1 Negative |
15 | CH1[1]+ | I | Differential Data Input, First Pixel Pair1 Positive |
16 | CH1[2]- | I | Differential Data Input, First Pixel Pair2 Negative |
17 | CH1[2]+ | I | Differential Data Input, First Pixel Pair2 Positive |
18 | GND | P | Ground |
19 | CH1CLK- | I | LVDS clock, First Pixel Negative. |
20 | CH1CLK+ | I | LVDS clock, First Pixel Positive. |
21 | GND | P | Ground |
22 | CH1[3]- | I | Differential Data Input, First Pixel Pair3 Negative |
23 | CH1[3]+ | I | Differential Data Input, First Pixel Pair3 Positive |
24~27 | NC | - | No Connection |
28 | CH2[0]- | I | Differential Data Input, Second Pixel Pair0 Negative |
29 | CH2[0]+ | I | Differential Data Input, Second Pixel Pair0 Positive |
30 | CH2[1]- | I | Differential Data Input, Second Pixel Pair1 Negative |
31 | CH2[1]+ | I | Differential Data Input, Second Pixel Pair1 Positive |
32 | CH2[2]- | I | Differential Data Input, Second Pixel Pair2 Negative |
33 | CH2[2]+ | I | Differential Data Input, Second Pixel Pair2 Positive |
34 | GND | P | Ground |
35 | CH2CLK- | I | LVDS clock, Second Pixel Negative. |
36 | CH2CLK+ | I | LVDS clock, Second Pixel Positive. |
37 | GND | P | Ground |
38 | CH2[3]- | I | Differential Data Input, Second Pixel Pair3 Negative |
39 | CH2[3]+ | I | Differential Data Input, Second Pixel Pair3 Positive |
40~43 | NC | - | No Connection |
44~46 | GND | P | Ground |
47 | NC | - | No Connection |
48~51 | VCC | P | Power Supply +12V |