T280XFLIHC-NX0A

Screen Size: 28(Diagonal) inch
Display Resolution: 1920RGB(W) x 360(H) Dot
Overall Dimension: 732(W) x 165(H) x 16.8(D) mm
Active Area: 699.84 x 131.22(H) mm
Pixel Pitch: 0.3645(W)x0.3645(H) mm
Color Configuration: Tri-Gate
Color Depth: 16.7M Color;Full color display depends on 24-bit data signal.
Color Gamut: 72%
Display Mode: Normally Black
Panel Surface Treatment: 3H, Haze 25%,
Weight: 2.36kg
Module Power Consumption: 24.8 (white pattern) W (Typ.)


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Product Details

Interface

Mechanical Spec.

Full Spec.

Resolution	1920*360 Dots	SIZE (INCHES)	28"
Interface	LVDS	Outline Dimensions (mm)	736.8169.528.2
Active Area (mm)	699.84*131.22	LCD Type	ADS
Viewing (O'clock)	All	Luminance (cd/m2)	700
Driver	BOE LCM	Top (°C)	0~+50
Tsg (°C)	-20~+60

LED BACKLIGHT

Connector: CI1406M1VL0-NH-6pin or equivalent

Pin No.	Symbol	Description
1	CH1+	VLED OUT CH1
2	CH1-	I Retrun CH1
3	NC	No Connection
4	NC	No Connection
5	CH2+	VLED OUT CH2
6	CH2-	I Return CH2

TFT LCD INTERFACE

Connector: GT05S-51S-H38-E1500 or Compatible

Pin No.	Symbol	I/O	Description
1~5	VCC	P	Power supply (12V)
6	NC	-	No connection
7~9	GND	P	Ground
10	RXO0-	I	Differential Data Input, CH0 (Negative)
11	RXO0+	I	Differential Data Input, CH0 (Positive)
12	RXO1-	I	Differential Data Input, CH1 (Negative)
13	RXO1+	I	Differential Data Input, CH1 (Positive)
14	RXO2-	I	Differential Data Input, CH2 (Negative)
15	RXO2+	I	Differential Data Input, CH2 (Positive)
16	GND	P	Ground
17	RXOC-	I	Differential Clock Input (Negative)
18	RXOC+	I	Differential Clock Input (Positive)
19	GND	P	Ground
20	RXO3-	I	Differential Data Input, CH3 (Negative)
21	RXO3+	I	Differential Data Input, CH3 (Positive)
22~23	NC	-	No connection
24	GND	P	Ground
25	RXE0-	I	Differential Data Input, CH0 (Negative)
26	RXE0+	I	Differential Data Input, CH0 (Positive)
27	RXE1-	I	Differential Data Input, CH1 (Negative)
28	RXE1+	I	Differential Data Input, CH1 (Positive)
29	RXE2-	I	Differential Data Input, CH2 (Negative)
30	RXE2+	I	Differential Data Input, CH2 (Positive)
31	GND	P	Ground
32	RXEC-	I	Differential Clock Input (Negative)
33	RXEC+	I	Differential Clock Input (Positive)
34	GND	P	Ground
35	RXE3-	I	Differential Data Input, CH3 (Negative)
36	RXE3+	I	Differential Data Input, CH3 (Positive)
37~38	NC	-	No connection
39	GND	P	Ground
40~44	NC	-	No connection
45	LVDS_SEL	I	H: JEIDA; L/Open: Normal NS LVDS / VESA
46~51	NC	-	No connection

I: Input; O: Output; P: Power

Notes: 1. NC (No Connection): These pins are only used for internal operations.

TFT LCD INTERFACE

LVDS Receiver: Timing Controller (LVDS Rx merged) / LVDS Data: Pixel Data

Channel No.	Data No.	8-bit LVDS Type
Channel No.	Data No.	NS	JEIDA
0	Bit-0	R0	R2
	Bit-1	R1	R3
	Bit-2	R2	R4
	Bit-3	R3	R5
	Bit-4	R4	R6
	Bit-5	R5	R7
	Bit-6	G0	G2
1	Bit-0	G1	G3
	Bit-1	G2	G4
	Bit-2	G3	G5
	Bit-3	G4	G6
	Bit-4	G5	G7
	Bit-5	B0	B2
	Bit-6	B1	B3
2	Bit-0	B2	B4
	Bit-1	B3	B5
	Bit-2	B4	B6
	Bit-3	B5	B7
	Bit-4	HS	HS
	Bit-5	VS	VS
	Bit-6	DE	DE
3	Bit-0	R6	R0
	Bit-1	R7	R1
	Bit-2	G6	G0
	Bit-3	G7	G1
	Bit-4	B6	B0
	Bit-5	B7	B1
	Bit-6	-	-